Table of Contents
Scripting interface
Workcraft supports scripting using JavaScript language. Two modes of script execution are supported:
- Interactively, by entering the script commands in the Javascript tab and pressing Ctrl+Enter to execute them. The output of the commands is redirected to the Output tab.
- In batch mode, by passing the script file name or a one-liner script after the
-exec:
command line parameter.
For batch mode it is often convenient to start Workcraft without GUI and without reading/writing configuration files. This is achieved by using -nogui
and -noconfig
command line parameter as follows (We presume that Workcraft home is in the search PATH and the platform-specific .sh
/.bat
extension of Workcraft runner is omitted):
workcraft -nogui -noconfig -exec:'/path/to/script.js'
If a script contains file operation commands, such as loading work files or exporting the models, then all the file names in these commands are relative to the working directory. By default this coincides with Workcraft home, however, an alternative working directory can be passed after the -dir:
command line parameter, as follows:
workcraft -nogui -noconfig -exec:script.js -dir:'/working/directory/path/'
since v3.2.3 For a short JavaScript snippet, it may be more convenient to pass it directly in the command line:
workcraft -nogui -exec:'print("Hello!");exit();'
For more information about these and other Workcraft startup options see Command line interface document.
Functions and variables
Here is a list of predefined wrapper functions, partitioned into categories, and global variables available for scripting.
Help
help(substring)
– output all the helper functions whose name contains the givensubstring
apropos(substring)
– output all the helper functions whose name or description contains the givensubstring
getHelp(substring, searchDescription)
– return a string with all helper functions whose name contains thesubstring
; if thesearchDescription
is true, then also search the function descriptions
Text output
print(msg)
– outputmsg
to stdout and add a newlineeprint(msg)
– outputmsg
to stderr and add a newlinewrite(text, fileName)
– writetext
to a filefileName
(relative to the working directory) or to stdout iffileName
is skipped
Note that conventional Java print functions can be also used, e.g. if you need to output text without adding a newline:
System.out.print(text)
– outputtext
to stdoutSystem.err.print(text)
– outputtext
to stderr
GUI and exit
startGUI()
– start GUIstopGUI()
– stop GUI and switch to console modequit()
orexit()
– request Workcraft shutdown after script execution is completeNote that
quit()
andexit()
do not terminate Workcraft immediately, and therefore should not be used in the middle of JavaScript program as a way to abort its execution. Insteadthrow('message')
JavaScript statement should be used for this purpose.
Global variables
args
– command line parameters passed to Workcraft; these can be iterated over as follows:for each (arg in args) {…}
framework
– the Workcraft framework singletonworkspaceEntry
– the current workmodelEntry
– the current model entry, a shortcut toworkspaceEntry.getModelEntry()
visualModel
– the current visual model, a shortcut tomodelEntry.getVisualModel()
mathModel
– the current math model, a shortcut tomodelEntry.getMathModel()
Workspace functions
getWorks()
– return an iterable array of loaded worksgetWorkFile(work)
– return a file object for the modelwork
getModelDescriptor(work)
– return a descriptor string for the modelwork
getModelTitle(work)
– return a title string for the modelwork
setModelTitle(work, title)
– set a title of the modelwork
to the stringtitle
closeWork(work)
– close the modelwork
closeAllWorks()
– close all the open workssetWorkingDirectory(path)
– setpath
as the working directory since v3.3.7getWorkingDirectory()
– get the working directory since v3.3.7
Editor functions
select(ref, …)
– select the nodes passed as a list of references since v3.5.1
File operations
load(fileName)
– load a model from the work filefileName
(or import from external file and determine the model type by the extension) and return its workimport(fileName)
– import a model from the filefileName
and return its work (the model type is determined by thefileName
extension) deprecated since v3.3.8 in favour of model-specific functions, as import is a reserved keyword in JavaScript ES6importCircuitVerilog(vFileName)
– import a Circuit from the given Verilog netlist (*.v) filevFileName
and return its work since v3.3.8importCircuitVerilog(vFileName, topModuleName)
– import a CircuittopModuleName
(can be skipped for auto detection) with its dependencies from the given Verilog netlist (*.v) filevFileName
and return its work since v3.3.9importFstSg(sgFileName)
– import an FST from the State Graph (*.sg) filesgFileName
and return its work since v3.3.8importStgG(gFileName)
– import an STG from the Signal Transition Graph (*.g) filegFileName
and return its work since v3.3.8importStgLpn(lpnFileName)
– import an STG from the Labeled Petri Net (*.lpn) filelpnFileName
and return its work since v3.3.8save(work, fileName)
– save the modelwork
into a file with the givenfileName
exportSvg(work, fileName)
– export the modelwork
as a Scalable Vector Graphics (*.svg) filefileName
exportPng(work, fileName)
– export the modelwork
as a Portable Network Graphics (*.png) filefileName
exportPdf(work, fileName)
– export the modelwork
as a Portable Document Format (*.pdf) filefileName
exportPs(work, fileName)
– export the modelwork
as a PostScript (*.ps) filefileName
exportEps(work, fileName)
– export the modelwork
as an Encapsulated PostScript (*.eps) filefileName
exportDot(work, fileName)
– export the modelwork
as a GraphViz (*.dot) filefileName
exportStgG(work, fileName)
– export the STGwork
as a Signal Transition Graph (*.g) filefileName
exportStgLpn(work, fileName)
– export the STGwork
as a Labelled Petri Net (*.lpn) filefileName
exportFstSg(work, fileName)
– export the FSTwork
as a State Graph (*.sg) filefileName
exportCircuitVerilog(work, fileName)
– export the Circuitwork
as a Verilog netlist (*.v) filefileName
exportDfsVerilog(work, fileName)
– export the DFSwork
as a Verilog netlist (*.v) filefileName
Configuration
setConfigVar(key, val)
– set the config variablekey
to valueval
getConfigVar(key)
– return the value of config variablekey
saveConfig()
– save settings into the default config fileloadConfig()
– load settings from the default config file
Config variables are saved in config.xml
file (located under ~/.config/workcraft/
in Linux or ~\AppData\Roaming\workcraft\
in Windows). The variable name you pass to setConfigVar/getConfigVar
functions can be derived from config.xml
file and should include its dot-separated path in the XML tree. For example, setConfigVar("CircuitSettings.clearPin", "RN");
sets the variable clearPin
under CircuitSettings
group to a string RN
.
Command execution
execFile(fileName)
– execute JavaScript filefileName
runCommand(work, className)
– apply the commandclassName
to the modelwork
as a background taskexecuteCommand(work, className)
– apply the commandclassName
to the modelwork
and wait for the result
Model specific commands
Commands for conversion, transformation and verification of specific models.
Conversion commands
These commands are applied to the given work
of a specific model type and produce a new model work.
- Conversion between different model types (sorted alphabetically)
convertCircuitToStg(work)
– convert the Circuitwork
into a new STG workconvertCircuitToStgWithEnvironment(work)
– convert the Circuitwork
and its environment into a new STG workconvertDfsToStg(work)
– convert the DFSwork
into a new STG workconvertFsmToFst(work)
– convert the FSMwork
into a new FST workconvertFsmToGraph(work)
– convert the FSMwork
into a new Graph workconvertFsmToPetri(work)
– convert the FSMwork
into a new Petri net workconvertFstToFsm(work)
– convert the FSTwork
into a new FSM workconvertFstToStg(work)
– convert the FSTwork
into a new STG workconvertGraphToFsm(work)
– convert the Graphwork
into a new FSM workconvertGraphToPetri(work)
– convert the Graphwork
into a new Petri net workconvertPetriToFsm(work)
– convert the Petri network
into a new FSM workconvertPetriToPolicy(work)
– convert the Petri network
into a new Policy net workconvertPetriToStg(work)
– convert the Petri network
into a new STG workconvertPolicyToPetri(work)
– convert the Policy network
into a new Petri net workconvertStgToBinaryFst(work)
– convert the STGwork
into a new binary FST workconvertStgToFst(work)
– convert the STGwork
into a new FST workconvertStgToPetri(work)
– convert the STGwork
into a new Petri net workconvertWtgToStg(work)
– convert the WTGwork
into a new STG work
- Conversion of STG and Petri net models using net synthesis of Petrify
convertPetriSynthesis(work)
– convert the Petri net/STG/FSM/FSTwork
into a new work using net synthesisconvertPetriSynthesisEr(work)
– convert the Petri net/FSM or STG/FSTwork
into a new Petri net or STG work using net synthesis with a different label for each excitation regionconvertPetriHideTransition(work)
– convert the Petri net/STGwork
into a new work hiding selected transitionsconvertPetriHideErTransition(work)
– convert the Petri net or STGwork
into a new Petri net or STG work hiding selected signals and dummies with a different label for each excitation regionconvertStgUntoggle(work)
– convert the STGwork
into a new work where the selected (or all) transitions are untoggledconvertStgHideDummy(work)
– convert the STGwork
into a new work without dummies
Composition commands
These commands are applied to a set of STG works passed as a space-separated list of file names relative to the working directory, and produce a new STG work.
composeStg(work, data)
– compose STGs specified by the space-separated list of work file namesdata
(work
parameter is ignored) since v3.3.0
Statistics commands
These commands produce a statistics string for the given work
of a specific model type.
statModel(work)
– node and arc count for the modelwork
(all model types are supported)statPetri(work)
– advanced complexity estimates for the Petri network
statStg(work)
– advanced complexity estimates for the STGwork
statCircuit(work)
– advanced complexity estimates for the Circuitwork
statCircuitRefinement(work)
– refinement dependencies for the Circuitwork
since v3.3.8
Synthesis commands
These commands are applied to the given work
of a specific model type and return a new model work.
- Logic synthesis of Circuits from STGs using Petrify backend
resolveCscConflictPetrify(work)
– resolve complete state coding conflicts in the STGwork
using PetrifysynthComplexGatePetrify(work)
– logic synthesis of the STGwork
into a complex gate Circuit work using PetrifysynthGeneralisedCelementPetrify(work)
– synthesis of the STGwork
into a generalised C-element Circuit using PetrifysynthStandardCelementPetrify(work)
– synthesis of the STGwork
into a standard C-element Circuit work using PetrifysynthTechnologyMappingPetrify(work)
– technology mapping of the STGwork
into a Circuit work using Petrify
- Logic synthesis of Circuits from STGs using MPSat backend
resolveCscConflictMpsat(work)
– resolve complete state coding conflicts in the STGwork
using MPSatsynthComplexGateMpsat(work)
– logic synthesis of the STGwork
into a complex gate Circuit work using MPSatsynthGeneralisedCelementMpsat(work)
– synthesis of the STGwork
into a generalised C-element Circuit work using MPSatsynthStandardCelementMpsat(work)
– synthesis of the STGwork
into a standard C-element Circuit work using MPSatsynthTechnologyMappingMpsat(work)
– technology mapping of the STGwork
into a Circuit work using MPSat
- Logic synthesis of Circuits from STGs using ATACS backend
synthComplexGateAtacs(work)
– logic synthesis of the STGwork
into a complex gate Circuit work using ATACSsynthGeneralisedCelementAtacs(work)
– synthesis of the STGwork
into a generalised C-element Circuit work using ATACSsynthStandardCelementAtacs(work)
– synthesis of the STGwork
into a standard C-element Circuit work using ATACS
Layout commands
These commands modify the given work
of a specific model type.
layoutModelDot(work)
– position nodes and shape the arcs using of the modelwork
using Graphviz backendlayoutModelRandom(work)
– randomly position graph nodes of the modelwork
and connect them by straight arcslayoutCircuit(work)
– place components and route wires of the Circuitwork
layoutCircuitPlacement(work)
– place components of the Circuitwork
layoutCircuitRouting(work)
– route wires of the Circuitwork
Verification commands
These commands are applied to the given work
of a specific model type and return a Boolean outcome of the check.
Note that the result of verification commands is of object Boolean type (with capital B), as opposed to primitive boolean type (with small b). In addition to the conventional true
and false
values, Boolean may also evaluate to null
(e.g. when verification command is not applicable to the supplied model).
Care should be taken when handling Boolean values in JavaScript – they cannot be directly used in logic expressions. For example, consider function 'f()' that returns a Boolean.
The following code snippet would always print pass, because the Boolean value is implicitly converted into a non-empty string ("true"
, "false"
or "null"
), which always evaluates to boolean true
:
if (f()) print("pass"); else print("fail"); // PROBLEM: this always prints pass
Instead, an explicit comparison to the expected boolean value should be used, thus forcing the cast of Boolean into boolean (instead of string) for subsequent comparison:
if (f() == true) print("pass"); else print("fail");
A cleaner way to encode logic expressions is to explicitly convert the value into boolean by using booleanValue()
method of Boolean type (this code would throw an exception if the result of f()
is not Boolean or the returned value is null
):
if (f().booleanValue()) print("pass"); else print("fail");
- Commands specific for Circuit models
checkCircuitBinateImplementation(work)
– check the Circuitwork
for correct implementation of its binate functions since v3.2.5checkCircuitCombined(work)
– combined check of the Circuitwork
for conformation to environment, deadlock freeness, and output persistencycheckCircuitConformation(work)
– check the Circuitwork
for conformation to environmentcheckCircuitCycles(work)
– check if the Circuitwork
is free from cyclic pathscheckCircuitDeadlockFreeness(work)
– check the Circuitwork
for deadlock freenesscheckCircuitOutputPersistency(work)
– check the Circuitwork
for output persistencycheckCircuitReachAssertion(work, data)
– check the Circuitwork
for REACH assertiondata
since v3.3.0checkCircuitReset(work)
– check if the Circuitwork
is correctly initialised via forced input portscheckCircuitSignalAssertion(work, data)
– check the Circuitwork
for signal assertiondata
since v3.3.0checkCircuitStrictImplementation(work)
– check the Circuitwork
for strict implementation of its signals according to the environment
- Commands specific for DFS models
checkDfsCombined(work)
– combined check of the DFSwork
for deadlock freeness and output persistencycheckDfsDeadlockFreeness(work)
– check the DFSwork
for deadlock freenesscheckDfsOutputPersistency(work)
– check the DFSwork
for output persistency
- Commands specific for FSM/FST models
checkFsmDeadlockFreeness(work)
- check the FSM/FSTwork
for deadlock freenesscheckFsmDeterminism(work)
- check the FSM/FSTwork
for determinismcheckFsmReachability(work)
- check the FSM/FSTwork
for reachability of all statescheckFsmReversibility(work)
- check the FSM/FSTwork
for reversibility of all states
- Commands specific for Graph models
checkGraphReachability(work)
– check the Graphwork
for reachability of all its nodes
- Commands specific for Policy net models
checkPolicyDeadlockFreeness(work)
– check the Policy network
for deadlock freeness
- Commands specific for STG models
checkStgCombined(work)
– combined check of the STGwork
for consistency, deadlock freeness, input properness, output persistency, and mutex implementabilitycheckStgConformation(work, data)
– check the STGwork
for conformation to the STG specified by file namedata
since v3.3.0checkStgConsistency(work)
– check the STGwork
for consistencycheckStgCsc(work)
– check the STGwork
for CSCcheckStgDeadlockFreeness(work)
– check the STG (or Petri net)work
for deadlock freenesscheckStgDiInterface(work)
– check the STGwork
for DI interfacecheckStgHandshakeProtocol(work, data)
– check the STGwork
for following a handshake protocol as specified bydata
, e.g.{req1 req2} {ack12}
since v3.3.0checkStgInputProperness(work)
– check the STGwork
for input propernesscheckStgMutexImplementability(work)
– check the STGwork
for implementability of its mutex placescheckStgNormalcy(work)
– check the STGwork
for normalcycheckStgNwayConformation(work, data)
– check the STGs specified by space-separated list of file namesdata
for N-way conformation (work
parameter is ignored) since v3.2.3, changed v3.3.0checkStgOutputDeterminacy(work)
– check the STGwork
for output determinacycheckStgOutputPersistency(work)
– check the STGwork
for output persistencycheckStgPlaceRedundancy(work, data)
– check the STG (or Petri net)work
for redundancy of places in space-separated listdata
since v3.3.0checkStgReachAssertion(work, data)
– check the STGwork
for REACH assertiondata
since v3.3.0checkStgSignalAssertion(work, data)
– check the STGwork
for signal assertiondata
since v3.3.0checkStgSpotAssertion(work, data)
– check the STGwork
for SPOT assertiondata
since v3.3.0checkStgUsc(work)
– check the STGwork
for USC
- Commands specific for WTG models
checkWtgInputProperness(work)
– check the WTGwork
for input propernesscheckWtgReachability(work)
– check the WTGwork
for reachability of nodes and transitionscheckWtgSoundness(work)
– check the WTGwork
for soundness and consistencycheckWtgSynthesisGuidelines(work)
– check the WTGwork
for compliance with the synthesis guidelines
Transformation commands
These commands modify the given work
of a specific model type.
- Generic commands applicable to all models
transformModelAnonymise(work)
– anonymise the modelwork
by randomly renaming its nodestransformModelCopyLabel(work)
– transform the modelwork
by copying unique names of the selected (or all) nodes into their labelstransformModelStraightenConnection(work)
– transform the modelwork
by straightening selected (or all) arcs
- Commands specific for FSM and derived models
transformFsmMergeState(work)
– transform the FSM/FSTwork
by merging selected statestransformFsmContractState(work)
– transform the FSM/FSTwork
by contracting selected states
- Commands specific for generic transformations in Circuit models
transformCircuitContractComponent(work)
– transform the Circuitwork
by contracting selected single-input/single-output componentstransformCircuitContractJoint(work)
– transform the Circuitwork
by contracting selected (or all) jointstransformCircuitDetachJoint(work)
– transform the Circuitwork
by detaching selected (or all) jointstransformCircuitDissolveJoint(work)
– transform the Circuitwork
by dissolving selected (or all) jointstransformCircuitInsertBuffer(work)
– transform the Circuitwork
by inserting buffers into selected wirestransformCircuitPropagateInversion(work)
– transform the Circuitwork
by propagating inversion through selected (or all) gatestransformCircuitSplitGate(work)
– transform the Circuitwork
by splitting selected (or all) complex gates into simple gatestransformCircuitToggleBubble(work)
– transform the Circuitwork
by toggling inversion of selected contacts and outputs of selected componentstransformCircuitToggleZeroDelay(work)
– transform the Circuitwork
by toggling zero delay of selected inverters and bufferstransformCircuitOptimiseZeroDelay(work)
– transform the Circuitwork
by discarding redundant zero delay attribute for selected (or all) inverters and buffers since v3.2.5transformCircuitMutexProtocolEarly(work)
– transform the Circuitwork
by setting early protocol for selected (or all) mutex components since v3.5.1transformCircuitMutexProtocolLate(work)
– transform the Circuitwork
by setting late protocol for selected (or all) mutex components since v3.5.1
- Commands specific for reset insertion in Circuit models since v3.2.2, change in v3.2.3
insertCircuitResetActiveHigh(work)
– insert active-high reset into the Circuitwork
insertCircuitResetActiveLow(work)
– insert active-low reset into the Circuitwork
tagCircuitForcedInitAutoAppend(work)
– append force init pins as necessary to complete initialisation of the Circuitwork
tagCircuitForceInitAutoAppend(work) before v3.4.0 – deprecatedtagCircuitForcedInitAutoDiscard(work)
– discard force init pins that are redundant for initialisation of the Circuitwork
tagCircuitForceInitAutoDiscard(work) before v3.4.0 – deprecatedtagCircuitForcedInitClearAll(work)
– clear all force init input ports and output pins in the Circuitwork
tagCircuitForceInitClearAll(work) before v3.4.0 – deprecatedtagCircuitForcedInitInputPorts(work)
– force init all input ports in the Circuitwork
(environment must initialise them)
tagCircuitForceInitInputPorts(work) before v3.4.0 – deprecatedtagCircuitForcedInitProblematicPins(work)
– force init output pins with problematic initial state in the Circuitwork
tagCircuitForceInitProblematicPins(work) before v3.4.0 – deprecatedtagCircuitForcedInitSequentialPins(work)
- force init output pins of sequential gates in the Circuitwork
tagCircuitForceInitSequentialPins(work) before v3.4.0 – deprecatedsetCircuitDriverInitToOne(work, ref, value)
– setvalue
as Init to one attribute for driverref
(input port or output pin) in Circuitwork
since v3.4.0getCircuitDriverInitToOne(work, ref)
– get Init to one attribute for driverref
(input port or output pin) in Circuitwork
since v3.4.0setCircuitDriverForcedInit(work, ref, value)
– setvalue
as Forced init attribute for driverref
(input port or output pin) in Circuitwork
since v3.4.0getCircuitDriverForcedInit(work, ref)
– get Forced init attribute for driverref
(input port or output pin) in Circuitwork
since v3.4.0constrainCircuitInputPortRiseOnly(work, ref)
– constrain input portref
in Circuitwork
as rise only since v3.4.0constrainCircuitInputPortFallOnly(work, ref)
– constrain input portref
in Circuitwork
as fall only since v3.4.0constrainCircuitInputPortAny(work, ref)
– clear constrains from input portref
in Circuitwork
since v3.4.0getCircuitDriverSetFunction(work, ref)
– get Set function of driverref
in Circuitwork
since v3.4.0getCircuitDriverResetFunction(work, ref)
– get Reset function of driverref
in Circuitwork
since v3.4.0
- Commands specific for loop breaking and scan insertion in Circuit models since v3.2.3
insertCircuitScan(work)
– insert scan for path breaker components into the Circuitwork
insertCircuitTestableGates(work)
– insert testable buffers/inverters for path breaker components in the Circuitwork
tagCircuitPathBreakerAutoAppend(work)
– append path breaker pins as necessary to complete cycle breaking in the Circuitwork
tagCircuitPathBreakerAutoDiscard(work)
– discard path breaker pins that are redundant for cycle breaking in the Circuitwork
tagCircuitPathBreakerClearAll(work)
– clear all path breaker pins in the Circuitwork
tagCircuitPathBreakerSelfloopPins(work)
– path breaker output pins within self-loops in the Circuitwork
setCircuitPinPathBreaker(work, ref, value)
– setvalue
as Path breaker attribute for pinref
in Circuitwork
since v3.4.0getCircuitPinPathBreaker(work, ref)
– get Path breaker attribute for pinref
in Circuitwork
since v3.4.0
- Commands specific for DFS models
transformDfsContractComponent(work)
– transform the DFSwork
by contracting selected componentstransformDfsMergeComponent(work)
– transform the DFSwork
by merging selected componentstransformDfsSplitComponent(work)
– transform the DFSwork
by splitting selected components since v3.5.2transformDfsWagging2Way(work)
– transform the DFSwork
by applying 2-way wagging to the selected pipeline sectiontransformDfsWagging3Way(work)
– transform the DFSwork
by applying 3-way wagging to the selected pipeline sectiontransformDfsWagging4Way(work)
– transform the DFSwork
by applying 4-way wagging to the selected pipeline section
- Commands specific for FSM and FST models
transformFsmContractState(work)
– transform the FSM/FSTwork
by contracting selected statestransformFsmSplitState(work)
– transform the FSM/FSTwork
by splitting selected states since v3.5.2- transformFsmMergeState
(work)
– transform the FSM/FSTwork
by merging selected states
- Commands specific for Petri net and (if explicitly stated) for derived models
transformPetriCollapseProxy(work)
– transform the Petri net (or derived model, e.g.STG)work
by collapsing selected (or all) proxy placestransformPetriContractTransition(work)
– transform the Petri network
by contracting a selected transitiontransformPetriDirectedArcToReadArc(work)
– transform the Petri net (or derived model, e.g.STG)work
by converting selected arcs to read-arcstransformPetriDualArcToReadArc(work)
– transform the Petri net (or derived model, e.g.STG)work
by converting selected (or all) dual producing/consuming arcs to read-arcstransformPetriMergePlace(work)
– transform the Petri net (or derived model, e.g.STG)work
by merging selected placestransformPetriMergeTransition(work)
– transform the Petri network
by merging selected transitionstransformPetriProxyDirectedArcPlace(work)
– transform the Petri net (or derived model, e.g.STG)work
by creating proxies for selected producing/consuming arc placestransformPetriProxyReadArcPlace(work)
– transform the Petri net (or derived model, e.g.STG)work
by creating selected (or all) proxies for read-arc placestransformPetriReadArcToDualArc(work)
– transform the Petri net (or derived model, e.g.STG)work
by converting selected (or all) read-arcs to dual producing/consuming arcs
- Commands specific for Policy net models
transformPolicyBundleTransition(work)
– transform the Policy network
by bundling selected transitions
- Commands specific for STG models
transformStgContractNamedTransition(work)
– transform the STGwork
by contracting a selected transitiontransformStgDummyToSignalTransition(work)
– transform the STGwork
by converting selected dummies to signal transitionstransformStgExpandHandshake(work)
– transform the STGwork
by expanding selected handshake transitionstransformStgExpandHandshakeReqAck(work)
– transform the STGwork
by expanding selected handshake transitions by adding _req and _ack suffixestransformStgExplicitPlace(work)
– transform the STGwork
by making selected (or all) places explicittransformStgImplicitPlace(work)
– transform the STGwork
by making selected (or all) places implicittransformStgInsertDummy(work)
– transform the STGwork
by inserting dummies into selected arcstransformStgMergeTransition(work)
– transform the STGwork
by merging selected transitionstransformStgMirrorSignal(work)
– transform the STGwork
by mirroring selected (or all) signalstransformStgMirrorTransition(work)
– transform the STGwork
by mirroring selected (or all) transition signtransformStgSelectAllSignalTransitions(work)
– select all transitions of selected signals in the STGwork
transformStgSignalToDummyTransition(work)
– transform the STGwork
by converting selected signal transitions to dummiestransformStgSplitTransition(work)
– transform the STGwork
by splitting selected transitions since v3.5.2
- Commands specific for WTG models
transformWtgStructureWaveform(work)
– transform the WTGwork
by structuring the waveforms
Cross-reference commands
These commands are intended for cross-referencing between work files.
- Commands specific for Circuit models
setCircuitEnvironment(work, env)
– setenv
STG file or work as an environment for the Circuitwork
since v3.2.3getCircuitEnvironment(work)
– get an environment STG file for the Circuitwork
since v3.2.3setCircuitComponentRefinement(work, ref, path)
– setpath
file as refinement for componentref
in Circuitwork
since v3.3.7getCircuitComponentRefinement(work, ref)
– get path to refinement file for componentref
in Circuitwork
since v3.3.7
- Commands specific for STG models
setStgRefinement(work, path)
– setpath
file as refinement for STGwork
since v3.3.7getStgRefinement(work)
– get path to refinement file for STGwork
since v3.3.7
Script examples
Basic
- stg-transform.js
// Mirror signals and untoggle transitions of STG model inStgWork = load("in.stg.work"); transformStgMirrorSignal(inStgWork); outStgWork = convertStgUntoggle(inStgWork); save(outStgWork, "out.stg.work"); exit();
- buck-synth.js
// Complex gate implementation for basic buck controller stgWork = load("buck.stg.work"); circuitWork = synthComplexGatePetrify(stgWork); save(circuitWork, "buck.circuit.work"); exportVerilog(circuitWork, "buck.v"); exit();
- workspace-info.js
// Print info for each loaded work and convert its title to upper case for each (work in getWorks()) { title = work.getTitle(); print("Info for " + title); print(" * Descriptor: " + getModelDescriptor(work)); print(" * File: " + getWorkFile(work).getName()); setModelTitle(work, title.toUpperCase()); print(" * Title: " + getModelTitle(work); }
Advanced
- synth.js
// Technology mapping of the specified .g files whose names are passed // without extension, as follows: // workcraft -dir:WORKING_DIRECTORY_PATH -exec:synth.js TEST1 TEST2 setConfigVar("CircuitSettings.gateLibrary", "path-to-genlib-file"); for each (name in args) { stgWork = import(name + ".g"); if (stgWork == null) { eprint("STG work loading failed!"); exit(); } if (checkStgCsc(stgWork) == true) { cscStgWork = stgWork; } else { cscStgWork = resolveCscConflictPetrify(stgWork); if (cscStgWork == null) { eprint("CSC conflict resolution failed!"); exit(); } save(cscStgWork, "vme-csc.stg.work"); } tmCircuitWork = synthTechnologyMappingMpsat(cscStgWork); if (tmCircuitWork == null) { eprint("Circuit synthesis failed!"); exit(); } if (checkCircuitCombined(tmCircuitWork) == true) { exportVerilog(tmCircuitWork, name + ".v"); } else { eprint("Circuit verification failed!"); } } exit();
- reset.js
// Define circuit initialisation scheme and insert active-low reset // (requires Workcraft v3.2.3 or newer) work = load("test-tm.circuit.work"); if (checkCircuitCombined(work) != true) { eprint("Circuit verification failed"); exit(); } tagCircuitForcedInitClearAll(work); tagCircuitForcedInitInputPorts(work); tagCircuitForcedInitAutoAppend(work); insertCircuitResetActiveLow(work); if (checkCircuitReset(work) != true) { eprint("Circuit cannot be reset to the required initial state"); exit(); } if (checkCircuitCombined(work) != true) { eprint("Circuit verification failed after reset insertion"); exit(); } exportVerilog(work, "test-tm-reset.v"); exit();