15-16 May 2017 at Dialog Semiconductor, Germering, Germany

This tutorial will cover both the fundamental principles of asynchronous system design and the advanced techniques for modelling, decomposition and initialisation of speed-independent circuits. Practical sessions will teach the engineer to use the Workcraft toolset for specification, synthesis, verification and initialisation of asynchronous circuits.

• Lectures (4 hours)
  • Asynchronous design principles
  • Models, techniques and tools
  • Logic synthesis from STGs
  • Implementation styles
  • Resolution of CSC conflicts

• Practicals (3 hours)
  • Introduction to Workcraft
  • Synthesis and verification of C-element
  • Synthesis and verification of buck controller
  • Synthesis and verification of VME bus controller (optional)

• Lectures (4 hours)
  • Modelling techniques
  • Decomposition techniques
  • Analog-to-asynchronous (A2A) interfaces

• Practicals (3 hours)
  • Modelling joint OR causality (warming up exercise)
    • Unsafe (with a 2-bounded place): or-joint-2bounded.stg.work (3 KiB)
    • Safe (all places have max 1 token): or-joint-1safe.stg.work (3 KiB)
  • Hierarchical design of a realistic buck controller
  • Initialisation of speed-independent circuits
  • Resolution of encoding (CSC) conflicts (optional)

• basic-lecture_1-introduction_to_principles_and_models.pdf (1 MiB)
• basic-lecture_2-logic_synthesis_and_implementation_styles.pdf (650 KiB)
• basic-practical_0-workcraft_overview.pdf (515 KiB)
• basic-practical_1-c_element.pdf (557 KiB)
• basic-practical_2-buck_controller.pdf (765 KiB)
• advanced-lecture_1-modelling_and_decomposition_techniques.pdf (1 MiB)
• advanced-lecture_2-a2a_bridges.pdf (2 MiB)
• advanced-practical_1-decomposition.pdf (437 KiB)
• advanced-practical_2-initialisation.pdf (227 KiB)