help:mutex:protocol
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| help:mutex:protocol [2024/12/16 16:00] – [Can MUTEX reliably follow the late protocol?] victor | help:mutex:protocol [2026/05/26 16:14] (current) – [Arbitration protocols] victor | ||
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| Related information: | Related information: | ||
| * [[wp> | * [[wp> | ||
| - | * [[a2a/ | + | * [[a2a/ |
| ===== Early vs late arbitration protocols ===== | ===== Early vs late arbitration protocols ===== | ||
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| One can observe that the early protocol can execute every trace that the late protocol can execute, but not vice versa: E.g. the trace ''< | One can observe that the early protocol can execute every trace that the late protocol can execute, but not vice versa: E.g. the trace ''< | ||
| - | From the point of view of circuit design, the arbiter is usually implemented using a (pre-designed) MUTEX cell, and one has to design a circuit around it, or more precisely, an STG which is then synthesised in a circuit. In other words, an asynchronous designer does not design a MUTEX cell (it is provided as a basic cell), but designs an STG that has to interface a MUTEX cell. Hence, the designer can, // | + | From the point of view of circuit design, the arbiter is usually implemented using a (pre-designed) MUTEX cell, and one has to design a circuit around it, or more precisely, an STG which is then synthesised in a circuit. In other words, an asynchronous designer does not design a MUTEX cell (it is provided as a basic cell), but designs an STG that has to interface |
| The early protocol is more permissive, i.e. it places strictly fewer requirements on the MUTEX implementation, | The early protocol is more permissive, i.e. it places strictly fewer requirements on the MUTEX implementation, | ||
| - | Hence, there are two possible | + | Hence, there are two possible |
| * make sure that MUTEX follows not just early but also late protocol, and design the circuit using either early or late protocol; | * make sure that MUTEX follows not just early but also late protocol, and design the circuit using either early or late protocol; | ||
| * design the circuit using early protocol. | * design the circuit using early protocol. | ||
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| Given all the above consideration, | Given all the above consideration, | ||
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| + | ===== MUTEX support in Workcraft ===== | ||
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| + | The traditional method of factoring out MUTEX into the environment (so the MUTEX grants are inputs to the STG) is considered obsolete in Workcraft flow, for the reasons it does not allow the features described below. Instead, MUTEXes are now treated as part of the circuit and specified in the STG so that their grants are outputs or internal signals. The place representing the choice between the grants should be tagged as a MUTEX place in the Property Editor (verification of output-persistence will fail if you forget to do that, as the grants disable each other; also, if the grants are declared as input signals, an error will be reported during the verification of the MUTEX protocol). The protocol is a property of the MUTEX place, and by default it is early, but can be changed to late by the user (who is then responsible for the outfall; the key is that the default is the safer protocol, and turning on the less safe late protocol is not tacit, the user has to actively do it). The visual representations of early and late MUTEX places is shown in the above STGs -- note that they look differently from each other and from non-MUTEX places. | ||
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| + | The verification and synthesis would recognise MUTEX places and treat them specially: | ||
| + | * the choice between grants (which are now internal or output signals) does not cause violation of output-persistence; | ||
| + | * arbitration protocol (of the type corresponding to the type of the MUTEX place) is verified for each MUTEX place; | ||
| + | * synthesis automatically adds MUTEX cells to the netlist (with the equations corresponding to the protocol). | ||
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