changelog:v3.2.6

Workcraft v3.2.6 (2020-02-29)

Property editor tooltips for Action properties.
De-clutter model-level property editor for signals (this affects FST, STG, WTG, XBM plugins):
- Signal name and type are merged into a single property that is span property over two columns.
- A button with bullet-point symbol on the left of the signal name changes the signal type, input → output → internal in a cycle.
- User can sort signals alphabetically or group them by type via Sort alphabetically / Group by type button; colour is used to visualise signal type in both grouped and sorted cases.
Support for loops in the trace simulation tool.
Improved editors for custom verification properties (e.g. REACH assertion, Signal assertion)
- Support for model-specific assertions that are stored in the model .work file.
- Examples of assertions in the property presets.
- Undo/redo functionality for the editor of custom assertions.

Digital Circuit plugin
- Separate port names for active-low and active-high reset.
- Renaming of zero delay inverters whose zero delay flag has been optimised away to a default value (g followed by a number).
- Delay for assign statements in Verilog export can be specified as an integer value via Edit→Preferences→Digital Circuit→Delay for assign statements in Verilog export (0 to suppress).
- Improved identification of set and reset functions when importing generalised C-element synthesis results from a Verilog file.

Signal Transition Graph plugin
- Persistent model title on model conversion/transformation.
- Explicit warning if dead signals are found during conformation check.