changelog:v3.2.5
Workcraft v3.2.5 (2019-11-21)
Usability improvements
Show shortcuts in Create work dialog for quickly creating new models
Configurable font size via global preferences (Edit→Preferences…):
In Common→Visual the properties Label font size (cm) and Name font size (cm).
In Models→Digital Circuit the properties Contact font size (cm) and Function font size (cm)
In Models→Signal Transition Graph the property Transition font size (cm)
Auto-save of last edited Custom properties and Custom assertions
Menu item for combined verification of all basic properties (in Digital Circuit, Signal Transition Graph, and Dataflow Structures) is renamed to All of the above (reuse unfolding) [MPSat]
Digital Circuit plugin
Tool for reducing the number of zero delay inverters (available via Transformation→Optimise zero delay of buffers and inverters (selected or all)).
Verification of circuit implementation for binate functions (via Verification→Binate consensus [MPSat]).
Names and pins of gates for synthesis of reset logic (BUF, AND2, OR2, NAND2B, NOR2B) are now automatically extracted from Genlib gate library.
In global preferences use of separators to create subsections for import/export, reset, and testing.
Undo/redo functionality in Initialisation analyser and Cycle analyser tools
Fixes and technical stuff
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