====== Design of Asynchronous Circuits: From Fundamental Principles to Advanced Techniques ======

//31 July - 02 August 2018 at [[http://www.dialog-semiconductor.com/|Dialog Semiconductor]], Campbell, USA//

At this course we will start from the theory and fundamental principles of asynchronous circuit design. Then we will proceed to the advanced techniques for technology mapping, and verification and synthesis of hierarchical designs. Practical session will teach the engineer how to use the Workcraft toolset to synthesise and verify asynchronous circuits, such as buck controller and VME bus controller.

===== Day 1: Fundamental principles =====
  * Lectures (3 hours)
    * Asynchronous design principles, models, techniques, and tools -- <wrap download>{{day_1-lecture_1-introduction_to_principles_and_models.pdf|slides}}</wrap>
    * Logic synthesis from STGs and implementation styles -- <wrap download>{{day_1-lecture_2-logic_synthesis_and_implementation_styles.pdf|slides}}</wrap>

  * Practicals (3-4 hours)
    * Introduction to Workcraft -- <wrap download>{{day_1-practical_0-workcraft_overview.pdf|handouts}}</wrap>
    * [[tutorial:design:c_element:start|Design of C-element]]
    * [[tutorial:design:basic_buck:start|Design of basic buck controller]]

===== Day 2: Modelling and Decomposition Techniques =====
  * Lectures (3 hours)
    * Modelling and decomposition techniques -- <wrap download>{{day_2-lecture_1-modelling_and_decomposition_techniques.pdf|slides}}</wrap>
      * Examples of modelling joint OR causality: <wrap download>{{or-joint-2bounded.stg.work}}</wrap>, <wrap download>{{or-joint-1safe.stg.work}}</wrap>
    * Analog-to-asynchronous (A2A) interfaces -- <wrap download>{{day_2-lecture_2-a2a_interfaces.pdf|slides}}</wrap>
    * CSC conflict resolution -- <wrap download>{{day_2-lecture_3-csc_conflict_resolution.pdf|slides}}</wrap>


  * Practicals (3-4 hours)
    * [[tutorial:design:hierarchical_buck:start|Hierarchical design of a realistic buck controller]]
    * [[tutorial:method:initialisation:start|Initialisation of speed-independent circuits]]
    * [[tutorial:method:csc_resolution:start|Resolution of encoding conflicts]]

===== Day 3: Advanced Techniques =====
  * Lectures (2 hours)
    * Logic decomposition and technology mapping -- <wrap download>{{day_3-lecture_1-logic_decomposition_and_technology_mapping.pdf|slides}}</wrap>
    * N-way conformation -- <wrap download>{{day_3-lecture_2-n_way_conformation.pdf|slides}}</wrap>

  * Practicals (3 hours)
    * [[tutorial:method:technology_mapping:start|Logic decomposition and technology mapping]]
    * [[tutorial:method:hierarchical_design:start|Verification and synthesis of hierarchical designs]]