====== SIS Genlib ======

Synthesis backend tools Petrify and MPSat use SIS Genlib format to specify gate library for technology mapping. Detailed specification of the format can be found in {{sis_genlib.pdf|SIS Genlib format documentation}}. Automated conversion from popular gate libraries is also possible, e.g. [[https://github.com/ARandomOWL/liberty-to-genlib|Converter from Synopsys Liberty]].


Example specifications:
  * 2-input AND gate:\ <code>
GATE    AND2        16  O=A*B;
PIN *   NONINV 1 999 1 0.2 1 0.2
</code>
  * 2-input C-element:\ <code>
LATCH   C2          20  Q=A*B+(A+B)*Q_NEXT;
PIN A   NONINV 1 999 1 0.2 1 0.2
PIN B   NONINV 1 999 1 0.2 1 0.2
SEQ Q   Q_NEXT ASYNCH
</code>

  * Tie high:\ <code>
GATE    LOGIC1       0   O=CONST1;
</code>